PowerPC 601 Microprocessor, lecture by Keith Diefendorff
4,597 views · Published 30 August 2016 · 31:29 · Indexed 27 October 2026
Channel: Computer History Museum · 2016 · People & Blogs
PowerPC 601 Microprocessor, a lecture by Keith Diefendorff. The video was recorded in August 1993. From University Video Communications' catalog: "The PowerPC RISC architecture is derived from the IBM POWER (RS/6000) architecture, which was simplified and enhanced to support aggressive superscalar implementations. The PowerPC 601 is the first of a family of PowerPC microprocessors being jointly developed by IBM and Motorola. This tape describes the characteristics and internal organization of the 601, which can dispatch three instructions per clock out-of-order, has a large 32KB on-chip cache, and a sophisti-cated memory interface unit. The 2.8 million transistor, 0.6 micron CMOS chip provides performance of over 60 SPECint92 and 80 SPECflt92 in a die less than 11mm on a side." Lot number: X6636.2013 Catalog number: 102624793
More from this channel
-
1:43:10
Crucial Crossroads: Technology X Retailing
-
1:56:13
From Gutenberg to Galaxy - Accessing Cultural Assets Online
-
47:08
2008 Fellow Awards
-
1:15:47
PLATO@50: Innovations in Hardware
-
1:22:53
Not Your Father's Internet
-
49:11
2011 Fellow Awards
-
55:34
The EDSAC Replica Project -- Computer Conservation in the UK
-
50:58
The History of Magnetic Striped Media Technology