Silicon Graphics TFP Micro-Supercomputer Chipset, lecture by Peter Yan-Tek Hsu

567 views · Published 30 August 2016 · 34:34 · Indexed 6 November 2026

Channel: Computer History Museum · 2016 · People & Blogs

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Silicon Graphics TFP Micro-Supercomputer Chipset, a lecture by Peter Yan-Tek Hsu. The video was recorded in August 1993.

From University Video Communications' catalog:

"The Silicon Graphics TFP microprocessor is a superscalar implementation of the MIPS instruction set architecture targeted at floating point intensive applications. Highlights include a four-issue instruction unit with branch prediction, a split-level interleaved cache that sustains two loads or stores per cycle, and a 300 mflops floating point unit."


Lot number: X6636.2013
Catalog number: 102624794

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